Electronic noise is an undesirable side effect of the operation of electronic circuits. Device switching and p-n junction operation are common sources of electronic noise in integrated circuits. The active load circuit 10 shown in FIG. 1 introduces electronic noise into the application circuit 12 that it loads. The active load circuit 10 has a voltage supply V.sub.CC, load transistor Q.sub.L1, load transistor Q.sub.L2, bias resistor R.sub.L and circuit ground 14. Q.sub.L1 and Q.sub.L2 are PNP transistors. The emitter of Q.sub.L1 is coupled to the voltage supply V.sub.CC. The collector of transistor Q.sub.L1 is coupled to the loading node 16. The base of transistor Q.sub.L1 is coupled to the base and collector of transistor Q.sub.L2 and to one terminal of the resistor R.sub.L. The emitter of transistor Q.sub.L2 is coupled to the voltage supply V.sub.CC. The other terminal of the resistor R.sub.L is coupled to ground 14.
The application circuit 12 shown in the prior art FIG. 1 is a photodiode preamplifier circuit. The anode terminal of the photodiode 18 is coupled to ground 14 and the cathode terminal of the photodiode 18 is coupled to the base of transistor Q.sub.2 and to one terminal each of the feedback resistor R.sub.F and the feedback capacitor C.sub.F. The emitter of transistor Q.sub.2 is coupled to a first biasing voltage level V.sub.E. The collector of transistor Q.sub.2 is coupled to the emitter of transistor Q.sub.1. The base of transistor Q.sub.1 is coupled to a second biasing voltage supply V.sub.B. The collector of transistor Q.sub.1 is coupled to loading node 16 and to the input of the gain-of-one amplifier 20. The output of the amplifier 20 is coupled to the output 22 of the photodiode preamplifier circuit 12 and to the other terminal of each of the feedback resistor R.sub.F and the feedback capacitor C.sub.F. The output 22 is used to drive external circuitry which is not shown.
Referring to FIG. 2 one can see a technique to reduce the noise introduced by the load circuit. A load resistor R.sub.L replaces the active load circuit 10 of FIG. 1 and is coupled between the power supply V.sub.CC and the collector of transistor Q.sub.1. Also such a resistive load must typically be a very high resistance, on the order of several hundred K.OMEGA. requiring much surface area on an integrated circuit. The base of transistor Q.sub.1 is coupled to a biasing voltage V.sub.B and the emitter is coupled to the collector of transistor Q.sub.2. The base of transistor Q.sub.2 is coupled to an input voltage V.sub.IN and the emitter is coupled to a biasing voltage V.sub.E.
If the circuit of FIG. 2 is designed to require a load current of 5 .mu.A, the resistor is 760 K.OMEGA.. Because the cost of manufacturing an integrated circuit is directly related to the area of the circuit, each of these prior art techniques of reducing noise resulting from an active load is undesirable. Where such techniques have been utilized typically the integrated circuit designer has required the user to attach an external resistor rather than integrating the large resistance into the device.